1. Field of the Invention
The present invention relates to an apparatus and method for handling semiconductor products, such as wafers and other workpieces. More particularly, the invention relates to a system for pre-aligning and processing a semiconductor wafer in a stepper or scanner exposure manufacturing process.
2. Discussion of the Related Art
Semiconductor dies are typically fabricated on a wafer formed of silicon and/or other materials. Integrated circuits are formed in the dies by photolithographic processes. For each photolithographic process, the wafer is coated with photoresist material, and then a reticle is used to expose a pattern in the photoresist material, and then the exposed photoresist material is removed to form an etch or deposition pattern.
Alignment marks may be etched or otherwise formed in the surface of the wafer. The alignment marks may be used to position the reticle precisely with respect to the die portions. That is, the locations of the die portions may be determined by the exposure apparatus based on the positions of the alignment marks.
In a “global” alignment process, two or more alignment marks, also called “combi” marks, are etched on the periphery of the wafer. A two-dimensional positioning system uses the alignment marks to accurately position a stepper exposure apparatus over successive die portions. The die portions are sequentially located and exposed by the stepper apparatus to develop the desired pattern in each die portion. Then a chemical bath is used to strip away the developed photoresist material, leaving the fine lines that eventually form the working integrated circuits.
During the photolithographic processes discussed above, the same photoresist material that covers the die portions is also coated on the alignment portions. The photoresist material on the alignment portions must be exposed so that it can be removed with the exposed material on the die portions. Unlike the exposure of the die portions, however, the exposure of the alignment mark portions does not require a high degree of accuracy. Tile apparatus used to expose the photoresist material on the alignment marks does not need to be precisely positioned.
There is a need in the art to reduce the processing time required to fabricate semiconductor devices. In particular, there is a need in the art to reduce the amount of time required to process wafers at exposure workstations.